The present invention relates to partial register writes, and more specifically, to generating error correction codes for the partial writes.
In a processor, data may be partially written in storage because only a portion of the data is available. When the remaining portion of data becomes available, the data already in storage is read out, merged with the incoming data, and then rewritten into storage as a full set of data. However, this operation (i.e., a read-modify-write) is inefficient and complex.